Tags: #◇Computer Science #◇CSARCH2 #◇Computer Architecture #◇Floating-Point Arithmetic #◇Exponent Alignment #◇Guard Round Sticky #◇Normalization #◇IEEE-754
Problem Set: Floating-Point Operations & Hardware Alignment
◇Overview & Theoretical Foundations
Floating-point addition and subtraction are significantly more complex than integer arithmetic because operands generally possess different exponents. Before significands can be added or subtracted, they must be shifted so that both numbers share a common exponent.
Floating-Point Addition/Subtraction Pipeline
┌───────────────────────┐ ┌───────────────────────┐
│ Operand 1 (s1,e1,m1) │ │ Operand 2 (s2,e2,m2) │
└──────────┬────────────┘ └──────────┬────────────┘
│ │
└──────────────┬──────────────┘
▼
┌───────────────────────────┐
│ 1. Compare Exponents │ Δe = |e1 - e2|
└─────────────┬─────────────┘
▼
┌───────────────────────────┐
│ 2. Align Significands │ Right-shift smaller significand by Δe;
│ (Extract G, R, S bits) │ Capture Guard, Round, Sticky bits
└─────────────┬─────────────┘
▼
┌───────────────────────────┐
│ 3. Add / Sub Significands │ Perform addition/subtraction on extended
│ (with G, R, S) │ significand + G, R, S registers
└─────────────┬─────────────┘
▼
┌───────────────────────────┐
│ 4. Normalize Result │ Shift left (cancellation) or right (carry)
│ (Adjust Exponent) │ Update exponent accordingly
└─────────────┬─────────────┘
▼
┌───────────────────────────┐
│ 5. Round (IEEE-754) │ Apply Round-to-Nearest-Even using G, R, S
│ (Check Overflow/Under) │ Re-normalize if rounding causes carry
└─────────────┬─────────────┘
▼
┌───────────────────────────┐
│ Final Repacked FP Result │
└───────────────────────────┘
1. Hardware Definition of Guard (), Round (), and Sticky () Bits
When right-shifting a significand by positions to align exponents:
- Guard Bit (): The first bit shifted out past the register's least significant bit (position ).
- Round Bit (): The second bit shifted out past the register (position ).
- Sticky Bit (): The logical OR of all subsequent bits shifted out past the Round bit (positions down to ). Once becomes , it remains under any further right shifts.
2. Comparison: Operations With vs. Without
| Feature | With Guard, Round, Sticky Bits | Without Guard, Round, Sticky Bits (Truncation) |
|---|---|---|
| Shift Handling | Bits shifted out are preserved in registers | Bits shifted out are immediately discarded (zeroed) |
| Rounding Accuracy | Enables exact IEEE-754 Round to Nearest Even | Inherently performs pure truncation (Round toward 0) |
| Error Bound | Maximum error (ULP) | Maximum error (accumulates systematically) |
| Cancellation Protection | Preserves precision during catastrophic cancellation | Severe precision loss during close subtractions |
◇Problem Solutions
Problem 1: Binary FP Addition WITH Guard, Round, and Sticky Bits (9-Bit System)
Problem Statement
Perform floating-point addition on the two binary operands in a system supporting a 9-bit significand (1 integer bit + 8 fraction bits) using Guard (), Round (), and Sticky () bits:
Step-by-Step Derivation
- Load Operands into 9-bit Registers:
- System register format: .
- Operand 1 ():
- Significand:
1.01111100(9 bits) - Auxiliary bits:
- Exponent:
- Operand 2 ():
- Original source:
1.00111111 100011 - Exponent:
- Exponent Alignment (Shift Smaller Operand ):
- Exponent difference:
- Shift the significand of right by bit positions:
- Exponent difference:
- Original 9-bit register:
1.00111111 - Shift 1:
0.10011111(bit1moves to ) - Shift 2:
0.01001111(bit1moves from to ; bit1moves into ) - Tracking remaining source bits ():
- Aligned Operand 2:
- Significand (9 bits):
0.01001111 - Exponent:
-
Significand Addition:
\begin{array}{r@{\quad}l@{\quad}c@{\,}c@{\,}c@{\quad}l} & \mathbf{1.01111100} & 0 & 0 & 0 & \times 2^5 \\ + & \mathbf{0.01001111} & 1 & 1 & 1 & \times 2^5 \\ \hline & \mathbf{1.11001011} & 1 & 1 & 1 & \times 2^5 \end{array}Bit-by-Bit Addition Detail:
-
Normalization Check:
- Result significand is
1.11001011_2. - The integer bit is already . No shift is needed; the exponent remains .
- Result significand is
-
Rounding (IEEE-754 Round to Nearest Even):
- Auxiliary bits: .
- Since and , the discarded part is strictly of the LSB unit.
- Action: Round UP (add to LSB of the 9-bit significand):
\begin{array}{r@{\quad}l} & 1.11001011 \\ + & 0.00000001 \\ \hline & \mathbf{1.11001100} \end{array} - Final Rounded Significand:
1.11001100.
Result Summary Table (Problem 1)
| Row | Significand (9 bits) | G | R | S | Notes | |
|---|---|---|---|---|---|---|
| Operand 1 | 1.01111100 | 0 | 0 | 0 | Unshifted primary operand | |
| Operand 2 | 0.01001111 | 1 | 1 | 1 | Right-shifted by 2 positions | |
| Sum | 1.11001011 | 1 | 1 | 1 | Raw intermediate sum | |
| Sum (normalize & round) | 1.11001100 | — | — | — | Rounded up () |
Problem 2: Binary FP Addition WITHOUT Guard, Round, and Sticky Bits (9-Bit System)
Problem Statement
Perform floating-point addition on the same binary operands in a 9-bit system WITHOUT Guard (), Round (), and Sticky () bits (pure truncation):
Step-by-Step Derivation
-
Load Operands into 9-bit Registers (Truncated):
- Operand 1 ():
1.01111100 - Operand 2 ():
1.00111111
- Operand 1 ():
-
Exponent Alignment (Shift Right by 2 without GRS):
- Exponent difference .
- Right-shifting
1.00111111by bit positions:
- The two least significant bits (
11) shift past the register boundary and are permanently lost (truncated). - Aligned Operand 2:
0.01001111.
-
Significand Addition:
\begin{array}{r@{\quad}l@{\quad}l} & \mathbf{1.01111100} & \times 2^5 \\ + & \mathbf{0.01001111} & \times 2^5 \\ \hline & \mathbf{1.11001011} & \times 2^5 \end{array} -
Normalization & Final Value:
- Significand is
1.11001011_2(already normalized). - Because no bits exist, no rounding can be performed.
- Final Result:
1.11001011.
- Significand is
Result Summary Table (Problem 2)
| Row | Significand (9 bits) | Notes | |
|---|---|---|---|
| Operand 1 | 1.01111100 | Unshifted primary operand | |
| Operand 2 | 0.01001111 | Shifted right 2; trailing bits lost | |
| Sum | 1.11001011 | Unrounded sum | |
| Sum (normalize) | 1.11001011 | Pure truncated result |
Error Analysis: Problem 1 vs. Problem 2
- Result with G, R, S (Prob 1):
1.11001100 - Result without G, R, S (Prob 2):
1.11001011 - Discrepancy:
- Conclusion: Omitting the Guard, Round, and Sticky bits causes a permanent loss of of precision due to premature truncation.
Problem 3: Decimal FP Addition WITH Guard, Round, and Sticky Digits (7-Digit System)
Problem Statement
Perform floating-point addition in a system supporting 7 decimal digits (1 integer digit + 6 fractional digits) using Guard (), Round (), and Sticky () digits:
Step-by-Step Derivation
- Load Operands into 7-digit Registers:
- Format: .
- Operand 1 ():
- Significand:
9.726542(7 digits) - Auxiliary digits:
- Exponent:
- Operand 2 ():
- Source:
8.873637 3412 - Exponent:
- Exponent Alignment (Shift Smaller Operand ):
- Exponent difference:
- Shift significand of right by decimal places:
- Exponent difference:
- Original 7-digit register:
8.873637 - Shift 1:
0.887363(digit7moves to ) - Shift 2:
0.088736(digit7moves to ; digit3moves to ) - Sticky digit (): Check remaining discarded source digits ():
- Aligned Operand 2:
- Significand (7 digits):
0.088736 - Exponent:
-
Significand Addition:
\begin{array}{r@{\quad}l@{\quad}c@{\,}c@{\,}c@{\quad}l} & \mathbf{9.726542} & 0 & 0 & 0 & \times 10^{15} \\ + & \mathbf{0.088736} & 3 & 7 & 1 & \times 10^{15} \\ \hline & \mathbf{9.815278} & 3 & 7 & 1 & \times 10^{15} \end{array}Digit-by-Digit Addition Trace:
-
Normalization Check:
- Result significand is
9.815278(). - Already normalized; exponent remains .
- Result significand is
-
Rounding:
- Guard digit: .
- Since , the discarded part () is strictly of the LSB unit.
- Action: Round DOWN (Truncate digits).
- Final Rounded Result:
9.815278.
Result Summary Table (Problem 3)
| Row | Significand (7 digits) | G | R | S | Notes | |
|---|---|---|---|---|---|---|
| Operand 1 | 9.726542 | 0 | 0 | 0 | Unshifted operand | |
| Operand 2 | 0.088736 | 3 | 7 | 1 | Right-shifted by 2 places | |
| Sum | 9.815278 | 3 | 7 | 1 | Raw intermediate sum | |
| Sum (normalize & round) | 9.815278 | — | — | — | Rounded down () |
Problem 4: Decimal FP Addition WITHOUT Guard, Round, and Sticky Digits (7-Digit System)
Problem Statement
Perform floating-point addition on the same decimal operands in a 7-digit system WITHOUT Guard (), Round (), and Sticky () digits (pure truncation):
Step-by-Step Derivation
-
Load Operands into 7-digit Registers (Truncated):
- Operand 1 ():
9.726542 - Operand 2 ():
8.873637
- Operand 1 ():
-
Exponent Alignment (Shift Right by 2 without GRS):
- .
- Shift
8.873637right by digits:
- Digits
37shift beyond the 7-digit register and are immediately lost (truncated). - Aligned Operand 2:
0.088736.
-
Significand Addition:
\begin{array}{r@{\quad}l@{\quad}l} & \mathbf{9.726542} & \times 10^{15} \\ + & \mathbf{0.088736} & \times 10^{15} \\ \hline & \mathbf{9.815278} & \times 10^{15} \end{array} -
Normalization & Final Value:
- Significand is
9.815278(already normalized). - Without , no further rounding adjustments occur.
- Final Result:
9.815278.
- Significand is
Result Summary Table (Problem 4)
| Row | Significand (7 digits) | Notes | |
|---|---|---|---|
| Operand 1 | 9.726542 | Unshifted operand | |
| Operand 2 | 0.088736 | Shifted right 2; trailing digits truncated | |
| Sum | 9.815278 | Raw sum | |
| Sum (normalize) | 9.815278 | Pure truncated result |
Comparative Insight: Why Problems 3 and 4 Produce the Same Result
- In Problem 3, the Guard digit was .
- Under IEEE-754 / standard rounding, any discarded fraction with rounds down (which is identical to truncation).
- Therefore, both methods converged to
9.815278. - In contrast, in Problem 1, with in binary () forced a round up, causing the GRS result to differ from the non-GRS truncated result of Problem 2 by .
◇Python Verification Script
def verify_operations():
# Problem 1 & 2: Binary Addition
op1_bin = 0b101111100 # 9 bits = 1.01111100
op2_bin_orig = 0b10011111 # 8 frac bits = 1.00111111
# Shift right by 2
op2_bin_aligned = op2_bin_orig >> 2 # 0.01001111
raw_sum_bin = op1_bin + op2_bin_aligned
print(f"Prob 1/2 Raw Sum Binary: {bin(raw_sum_bin)} (Expected: 0b111001011 -> 1.11001011)")
# Rounding Prob 1: G=1, R=1, S=1 -> Round UP (+1 LSB)
rounded_sum_bin = raw_sum_bin + 1
print(f"Prob 1 Rounded Sum Binary: {bin(rounded_sum_bin)} (Expected: 0b111001100 -> 1.11001100)")
# Problem 3 & 4: Decimal Addition
op1_dec = 9.726542
op2_dec_aligned = 0.088736
sum_dec = round(op1_dec + op2_dec_aligned, 6)
print(f"Prob 3/4 Decimal Sum: {sum_dec:.6f} (Expected: 9.815278)")
verify_operations()
◇Key Takeaways & Exam Summary
- Alignment Shift Direction:
- Always shift the operand with the smaller exponent to the right ().
- Never shift the larger exponent left, as this would cause integer overflow out of the significand register.
- Auxiliary Bit Functionality:
- and capture the first two bits shifted out during alignment.
- acts as a cumulative OR reduction: .
- Rounding Penalty without GRS:
- Omitting bits introduces systematic truncation bias and leads to error whenever discarded bits exceed .
- Normalization after Addition:
- If an addition generates a carry out of the MSB (), right-shift the significand by and increment the exponent by .
- If subtraction cancels leading bits (), left-shift until the MSB is and decrement the exponent accordingly.
◇References & Navigation
- Related Notes: ◇Floating-Point Operations & Errors