Tags: #◇Computer Science #◇LBYARCH #◇Assembly #◇x86-64 #◇Verilog #◇Reviewer #◇Finals
LBYARCH Comprehensive Finals Reviewer
◇Overview
This reviewer synthesizes Computer Architecture and Organization Laboratory (LBYARCH). The curriculum comprises digital system modeling in Verilog HDL (combinational ALU design, testbenches with $monitor and $finish, structural vs behavioral syntax), x86-64 assembly programming using NASM, System V AMD64 ABI calling conventions, pointer and array memory addressing, floating-point scalar and SIMD vector operations (SSE/AVX: XMM/YMM registers), and interfacing C drivers with native x86-64 assembly kernels.
◇1. System V AMD64 ABI Calling Convention Matrix
| Register | Role / ABI Specification | Preserved across Call? (Saved by) |
|---|---|---|
RAX | 1st Return Value (integers, pointers) | Caller-Saved (Scratch) |
RDX | 2nd Return Value | Caller-Saved (Scratch) |
RDI | 1st Function Argument | Caller-Saved |
RSI | 2nd Function Argument | Caller-Saved |
RDX | 3rd Function Argument | Caller-Saved |
RCX | 4th Function Argument | Caller-Saved |
R8 | 5th Function Argument | Caller-Saved |
R9 | 6th Function Argument | Caller-Saved |
XMM0–XMM7 | Floating-point arguments and return value (XMM0) | Caller-Saved |
RBX, RSP, RBP, R12–R15 | Callee-Saved Registers | Callee-Saved (Must restore before ret) |
[!IMPORTANT] Stack Alignment Requirement
The System V AMD64 ABI mandates that the stack pointerRSPmust be 16-byte aligned (RSP % 16 == 0) immediately prior to executing anycallinstruction! Becausecallpushes the 8-byte return address, inside the function prologueRSP % 16 == 8.
◇2. x86-64 Stack Frame Architecture
◇3. High-Yield Exam Checklist
- Are the first 6 integer arguments passed in
RDI,RSI,RDX,RCX,R8,R9? YES. - If a function modifies
RBX,R12,R13,R14, orR15, must it push and pop them? YES (Callee-saved). - How is an array element
arr[i]accessed in x86-64 whenRDI = arrandRCX = ifor 4-byte integers?[rdi + rcx*4]. - In NASM, does
mov eax, [rbx]dereference the memory address inRBX? YES (brackets mean dereference). - In Verilog, what simulator directive stops simulation?
$finish;.
◇References & Navigation
- Previous Topic: ◇CSARCH1
- Next Topic: ◇CSARCH2
- Prerequisites: ◇Assembly Lab, x86-64 NASM, System V ABI, Verilog Simulation
- Cross-Curricular Connections: ◇CSOPESY
ACTIVE RECALL VERIFICATION
Select an answer to verify conceptual comprehension and reveal the technical rationale.
Under the System V AMD64 ABI, in which register does a C caller pass the third integer argument to an assembly function?
Which register must be explicitly preserved (pushed and popped) by an assembly function if it is modified during execution?
In x86-64 assembly, what does the instruction lea rax, [rdi + rsi*4 + 8] do?
If an assembly function calls printf, what condition must be satisfied regarding the stack pointer RSP prior to the call?
In Verilog HDL testbenches, which system task displays a formatted string in the console whenever any monitored variable changes value?