Tags: #◇Computer Science #◇CSARCH1 #◇Computer Architecture #◇Combinational Circuits #◇Combinational Circuit - Decoder

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Combinational Circuit - Decoder

◇Overview

This sub-module discusses how to implement combinational circuits using decoders.
Objective: Learn how to implement combinational circuits using decoders.

◇Definitions

Decoders:

• A combinational circuit that converts binary information from $n$ input lines to a maximum of $2^n$ unique output lines.
• If $n$-bit coded information has unused combinations, the decoder may have fewer than $2^n$ outputs.
• Decoders generate $2^n$ (or fewer) minterms of $n$ input variables.
• In general, decoders are called $n$-to-$m$-line decoders, where $m \le 2^n$.
• Example: A three-to-eight-line decoder decodes 3 input variables into eight output lines (each representing one of the minterms).

◇Types of Decoders

Positive Output Decoder

A circuit capable of accepting an $n$-variable input and generating the corresponding output signal in one of the $2^n$ output lines.

• For each possible input combination, there are outputs that are equal to 0 and only one that is equal to 1.

Negative Output Decoder

A circuit capable of accepting an $n$-variable input and generating the corresponding output signal in one of the $2^n$ output lines.

• The active output is 0, while all other outputs are 1.

◇Guidelines in Implementing Functions Using Decoders

• Positive Input, Positive Output:
  • $\sum$: use OR gate
  • $\prod$: use NOR gate
• Positive Input, Negative Output:
  • $\sum$: use NAND gate
  • $\prod$: use AND gate

◇Combinational Logic Implementation using Decoders

A decoder provides the $2^n$ minterms of $n$ input variables.
Example: Implementation of a full-adder with a decoder.

◇Decoders with Enable Inputs

Example: Two-to-four-line decoder (constructed with NAND gates) with an enable input.

• Circuit has complemented outputs.
• Circuit is disabled when Enable (E) is equal to 1, regardless of the values of the other two inputs.

◇Forming Larger Decoders

Decoders can be combined to form larger ones.
Example: 4-to-16-line decoder constructed with two 3-to-8-line decoders.

• When $w = 0$, the top decoder is enabled.
• When $w = 1$, the bottom decoder is enabled.

Additional Note:
A decoder with an enable input can function as a demultiplexer (a circuit that receives information from a single line and directs it to one of $2^n$ possible output lines).

• $w$ is taken as the data input.
• $x, y,$ and $z$ are taken as the selection inputs.

◇References & Navigation

• Previous Topic: ◇Combinational Circuit - Design
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